1. Field of the Invention
The present invention relates, in general, to a method for fabricating a semiconductor device and, more particularly, to the use of the porosity of TiN layer in absorbing moisture and oxygen therein so that they can react with the Si of the semiconductor substrate to create an gate oxide without a separate step, thereby improving the production yield and the reliability of device operation.
2. Description of the Prior Art
At a sacrifice of the width in the gate electrode of MOSFET, the high integration of semiconductor devices is usually accomplished. However, n-folds decrease in the width of the gate electrode causes n-folds increase in the electric resistance thereof, resulting in lowering the operational speed of the semiconductor device. In order to reduce the resistance of gate electrode, a polycide, a lamination structure of polysilicon layer and silicide, is used as a low resistance gate, taking advantage of the property of the polysilicon layer/oxide film interface, which shows the most stable MOSFET attribute.
Generally, current driving ability is one of the most important functions the transistors constituting a semiconductor device circuit must have. In consideration of this, the channel width of MOSFET should be controlled. The widely used MOSFET employs an impurity-doped polysilicon layer as a gate electrode and a diffusion region as a source/drain region in which an impurity is doped on a semiconductor substrate. Typically, the gate electrode has a face resistance of about 30-70 .OMEGA./.quadrature. while the source/drain region has a face resistance ranging from about 70 to 150 .OMEGA./.quadrature. for N.sup.+ and from about 100 to 250 .OMEGA./.quadrature. for P.sup.+. A contact resistance of about 30-70 .OMEGA./.quadrature. per contact is allowed for the contacts which are formed in the gate electrode or the source/drain region.
In order to reduce the high resistances of the gate electrode and the source/drain region, and the contact resistance, a metal silicide film is formed only over the gate electrode and the source/drain region by a self-aligned silicide (salicide) process or a selective metal film deposition process, thereby improving the current driving ability of MOSFET.
For example, the employment of Ti silicide allows a reduction in the face resistance of the gate electrode and the source/drain electrode into 50 .OMEGA./.quadrature. or less, and the contact resistance into about 3 .OMEGA./.quadrature. per contact or less, giving rise to an increase in the current driving ability of MOSFET by 40% or more, so that the high integration of MOSFETs is possible.
Hence, it is increasingly necessary to reduce such face resistance by forming a silicide layer on the surfaces of both the gate electrode and the source/drain electrode in a DRAM device of 1 giga or more or in a logic device demanding high integration and high speed at the same time.
Particularly, recent research has been directed to the use of a low specific resistance metal, instead of polysilicon, in a word line which operates a transistor. Of various metals, tungsten attracts attention for gate metal by virtue of its high conductivity as expressed by a low specific resistance of about 11 .mu. .OMEGA.cm and its high melting point of 3,400.degree. C.
A description will be given of a conventional fabricating method of a semiconductor device in conjunction with FIG. 1.
First, a semiconductor substrate 10 is prepared in a predetermined region of which an element-isolating oxide 12 is formed. A gate oxide film 14 is formed over the semiconductor substrate 10 between the element-isolating oxides 12, followed by the sequential formation of a glue layer 16 of TiN and a W layer 18 over the resulting structure, as shown in FIG. 1A.
Then, the W layer 18 and the glue layer 16 are patterned in sequence to produce a gate electrode 20 consisting of a W layer pattern and a glue layer pattern, as shown in FIG. 1B. Thereafter, a source/drain region is created in a region of the semiconductor substrate 10 below both flanks of the gate electrode 20, to give a MOSFET.
This conventional fabricating method of a semiconductor device, however, has problems in that the stress attributed to the difference in the high coefficient of thermal expansion between a gate electrode and a gate oxide either degrades the gate oxide or separates the gate electrode.